This invention relates to DC-DC converters, and in particular to a pulse-width modulated (PWM) DC-DC converter.
PWM DC-DC converters are widely used, see for example Maxim data sheet MAX 731/MAX 752, 19-4672; Rev 2; dated February, 1993. To generate a constant output voltage, the output voltage is fed back through a voltage divider, compared with a ramp voltage from a ramp generator via an error amplifier and the comparator, and applied to a switching transistor to adjust the duty cycle for the constant output voltage. Connected between the comparator and the switching transistor is a flip-flop to which the clock frequency of a clock is applied for activating the switching transistor.
The stability limit of the feedback DC-DC voltage converter is a function of the current through an inductor and the inverse of the input voltage. The inductor current is a function of the load current and the input voltage. The loop gain is influenced by the inductor current and the inverse of the input voltage. It increases with increasing inductor current, whereas the poles of the system, i.e., the phase shifts of the loop gain, remain unchanged. This results in a reduction of the phase margin and thus produces instability.
To compensate for this effect, capacitors are connected in parallel with the voltage divider which influence the frequency response in such a way that sufficient stability is achieved for a particular range of load currents and of the input voltage. Since the poles, which are determined by the smoothing capacitor and the inductor, are located at very low frequencies, very large compensation capacitors are necessary. These are not suitable for monolithic integration.
Another measure to stabilize the DC-DC converter is to add a voltage proportional to the inductor current to the ramp voltage from the ramp generator with an adder. Use is made of a voltage proportional to the current through the switching transistor. Thus, at high inductor currents, the comparator switches earlier, so that the on time of the switching transistor and the loop gain are reduced. This compensation has the disadvantage that an additional, accurate adder is needed to compensate the ramp generator. Another disadvantage is that at a high inductor current, the loop gain is reduced already at the beginning of the turn-on cycle. As a result, the gain is also reduced at high input voltages, which adversely affects the accuracy of the output voltage.
An object of the invention is to provide an improved pulse-width-modulated DC-DC converter.
Briefly, according to the present invention, a PWM DC-DC converter comprises a series combination of a switching transistor and an inductor, with the switching transistor shunted by a smoothing capacitor in series with a switching element, so that an input voltage applied to the series combination of the switching transistor and the inductor is converted into a higher output voltage appearing across the smoothing capacitor; an error amplifier having its first input connected to a voltage divider, to which the output voltage can be applied, and having its second input connected to a reference voltage source; and a comparator having its first and second inputs connected, respectively, to the output of the error amplifier and to a ramp generator compensated a signal proportional to the current through the inductor, and having its output coupled to the gate electrode of the switching transistor. The compensated ramp generator provides an output voltage having a sawtooth waveform with a concave voltage, wherein the signal proportional to the current through the inductor is superimposable on the ramp voltage.
Through the concave rise of the ramp voltage generated by the compensated ramp generator, a higher slew rate of the ramp voltage is attained. As a result, the gain of the feedback DC-DC converter is reduced only at high inductor currents and low input voltages. Consequently, the frequency response of the DC-DC converter can be held constant despite changes in operating conditions, particularly despite changes in input voltage and load current. A smaller loop gain at high input voltages, and thus a loss of accuracy of the output voltage of the DC-DC converter, is prevented.
In one preferred embodiment of the invention, the ramp generator is designed so that the sum of a correction current, which is proportional to the inductor current, and a constant reference current is integrable in the ramp generator, so that the output voltage of the ramp generator rises quadratically. By this design of the ramp generator, a frequency response of the DC-DC converter independent of the operating conditions is achieved in a simple manner. It is not necessary to use a device occupying a large area, such as an accurate adder.
In another preferred embodiment of the invention, the integration of the sum of the correction current and the constant reference current is accomplished by supplying the correction current and the constant reference current to a capacitor which can be discharged by a parallel-connected switching element at the frequency of the signal applied to the gate electrode of the switching transistor. A quadratic rise of the ramp voltage is thus obtained in a simple manner.
To generate the correction current, a first amplifier may advantageously be provided, to whose input a voltage proportional to the inductor current can be applied, and whose output is connected through a resistor to a first node of constant potential, to which the correction current can be supplied. For the amplifier, a unity-gain buffer can be used. It can be implemented with a feedback operational amplifier. The operational amplifier may have an output stage that includes a first reference current source in series with a first transistor connected in common-source configuration.
To generate the constant node potential in the first node, a second operational amplifier may be provided. The first input of the second operational amplifier is connected to a first constant reference voltage source, and the second input is connected to the first node. The first node makes the constant node potential available over a low-resistivity path and is connected to the output of the second operational amplifier. The output stage of the second operational amplifier may include a second reference current source in series with a second transistor connected in common-source configuration. Thus, the sum of the correction current and the constant reference current can flow into the node.
In yet another preferred embodiment of the invention, a current mirror is provided which mirrors the sum of the correction current and the constant reference current produced at the node onto the capacitor. The current mirror can be formed from the first and second operational amplifiers and a third transistor connected in common-source configuration. The gate of the third transistor is connected to the gate of the first transistor, and the drain of the third transistor is connected to the capacitor. In another embodiment, the gate of the third transistor is connected to the gate of the second transistor, and the drain of the third transistor is connected to the capacitor via a second current mirror.
The first transistor and the second transistor may have a fixed relationship to each other in terms of their electrical characteristics. In the case of MOSFET transistors, this is achieved by fixed W/L (width/length) ratios of the transistors. With the first and second reference current sources, currents having a fixed relationship to each other may be generable. If the reference current sources generate equal currents, and the first and second transistors have the same electrical characteristics, equal conditions exist in the circuit, so that a good match of the individual circuit elements is obtained, whereby electrical influences and influences of temperature or of mask alignment errors are avoided.
The signal proportional to the inductor current can be determined from the voltage drop across the switching transistor. This is possible since the switching transistor is operated in the triode region, so that it behaves as a resistor. Methods of determining the inductor current are known from the prior art, for example from German patent application P 198 12 299.3. Advantageously, the circuit is implemented using monolithic integrated circuit technology.
These and other objects, features and advantages of the present invention will become apparent in light of the following detailed description of preferred embodiments thereof, as illustrated in the accompanying drawings.